1. Field of the Invention
The present invention relates generally to the fabrication of integrated circuits on substrates. More specifically, the invention relates to a system and method that deposits an electroless seed layer prior to electroplating on the substrate.
2. Background of the Invention
Sub-quarter micron multilevel metallization represents one of the key technologies for the next generation of ultra large scale integration (ULSI) for integrated circuits. Reliable formation of multilevel interconnect features, including contacts, vias, lines, and trenches is very important to the success of ULSI and to the continued effort to increase circuit density on individual substrates and die. As circuit densities increase, the widths of vias, contacts and other features decrease to 0.25 .mu.m or less, whereas the thicknesses of the dielectric layers remains substantially constant, with the result that the aspect ratios for the features, i.e., their height divided by width, increases. Many traditional deposition processes have difficulty filling strictures where the aspect ratio exceeds 6:1, and particularly where it approaches 10:1.
One traditional process is a physical vapor deposition (PVD) process. Generally, bias is created in a PVD chamber between a target having sputterable material and a substrate on which the material is to be sputtered. An inert gas is flown into the chamber and a plasma is created of inert gas ions between the target and substrate. The inert gas ions impact the target, dislodge the target material, and some of the material is directed to the substrate and deposited thereon. FIG. 1a is a side view schematic of material deposited in a feature with PVD processing. In high aspect ratio features, the deposition from a PVD process is typically concentrated near the opening of the feature and leaves voids in the deposition in the lower portions of the features such as the bottom and corners of the feature. The opening can become sealed creating a void in the feature, leading to defects in the substrate.
One alternative to traditional PVD processing that has recently been developed is a high pressure PVD process, which ionizes the target material after it has been sputtered and directs the target material in an highly aligned path parallel to the depth of the high aspect features. Such a process, known as an ionized metal plasma (IMP) process, deposits more material on the bottom of the feature than traditional PVD processing. PVD processing and high pressure PVD processing is described in co-pending U.S. Ser. No. 08/989,759 filed Dec. 12, 1997 and is incorporated herein by reference. FIG. 1b is a side view schematic of material deposited in a feature with IMP processing. However, the ionized material does not uniformly deposit on the sidewalls of the feature, particularly near the middle of the feature. As the deposit increases, the opening can be closed, also creating a void near the middle of the feature.
Because of the difficulties in filling high aspect ratio features, processes other than PVD are being developed to deposit metals such as copper or aluminum. Electroplating, used in other industries, has recently been explored as a viable alternative for filling sub-quarter micron features. Generally, the electroplating process is able to grow the deposited material on a conductive surface and fill even the high aspect ratio features substantially free of voids. Typically, electroplating uses a suspension of generally positively charged ions of deposition material in contact with a negatively charged substrate, as a source of electrons, to plate out the deposition material on the charged substrate. On a typical non-conductive substrate, a thin conductive material is first deposited on the substrate and in the features and provides an electrical path across the surfaces. An electrical current is supplied to the conductive material and the substrate is electroplated with an appropriate conductive material, such as aluminum or copper. However, the integrity of the initial conductive material layer determines the integrity of the subsequent electroplated layer. For instance, discontinuities in the initial conductive layer can affect the electrical current and cause defects in the electroplated layer.
Therefore, there remains a need to provide a system and method that extends the reliability of depositions in features by enhancing an initial conductive layer for a subsequent electroplating process.